Micron to launch G11 NAND with doubled density in late 2027
The new chips will use wafer bonding to reach 42 Gb/mm2, boosting speed and efficiency for AI and data centers.
By Thomas Obasi ·
Micron will begin mass production of its G11 NAND flash memory in the second half of 2027. The new chips will store roughly twice as much data in the same physical space as the current G9 generation. This change is designed to improve performance for high-capacity solid-state drives and devices handling artificial intelligence workloads.
The company outlined these plans at an industry event this week. Micron stated that G11 will move from a storage density of about 21 Gb/mm2 to 42 Gb/mm2 in triple-level-cell form. Input/output speeds are expected to rise by up to 50%, increasing from 3,600 MT/s to 5,400 MT/s. The energy required to transfer each bit of data should drop by more than 25%.
A key engineering shift in G11 is the use of wafer-on-wafer bonding. This technique allows engineers to fabricate the memory array and the peripheral logic circuits on separate wafers. Each wafer is processed using a method best suited for its specific function. The two are then bonded together. This approach offers more flexibility than previous designs that placed logic circuits directly under the memory array.
Scott DeBoer, Micron’s president and chief technology and products officer, confirmed the adoption of this bonding method. He said the timing is right for the technology to become cost-effective and relevant to product specifications. DeBoer described G11 as the most advanced NAND in the market.
The new chips will feature more than 400 layers, surpassing the current generation. Micron has not disclosed the exact number of active wordline layers or memory decks. The company noted that the design will have an industry-leading memory cell pitch, suggesting that smaller cell dimensions contribute to the density gains alongside the increased layer count.
Micron plans to share further technical details in 2027 as high-volume production approaches. The company aims to continue scaling in all three dimensions beyond G11. DeBoer indicated that future generations will rely on new high-mobility materials and denser cell architectures to improve transistor characteristics and reduce power consumption.
The firm has not released specific timelines or density targets for generations following G11. Demand for NAND-based storage remains strong, and the industry is expected to continue increasing layer counts and shrinking cell sizes in the coming years.
